1. Field of the Invention
The present invention relates to a chip scale package (CSP) type of semiconductor device and a method of manufacturing it.
2. Description of the Prior Art
The structure of a semiconductor device as shown in FIG. 9 is previously known in which with the inner lead portion 122 of a lead 102 connected (bump-connected) to an electrode 111 of a semiconductor chip 101 and while the outer lead portion 123 of the lead 102 is protruded, a semiconductor chip 101 is sealed with resin 103.
This semiconductor device can be manufactured by the "TAB" (Tape automated bonding) technique.
Specifically, a film carrier tape (having sprocket holes) with a large number of leads (copper foils being formed by etching) formed at regular intervals, each having an inner lead portion and outer lead portion, is intermittently transported by sprockets. At a chip attachment station, an electrode of the semiconductor chip is connected to the inner lead portion of each lead on the film carrier tape using a bump. Further, at a resin applying station, sealing resin is dropped and applied onto the surface of the electrode side of a semiconductor chip. Thereafter, the film carrier tape is stamped around the semiconductor chip. Thus, the semiconductor device can be manufactured.
The above package structure, however, requires the pitch of the outer lead portions of the leads to be greatly extended from the point of view of accuracy of soldering, which results in a large scale of package. This is disadvantageous to realize the semiconductor device with a high density.
To solve the above problem, several proposals have been made for a chip scale package type of semiconductor device. The semiconductor device as shown in FIG. 10 belongs to a chip scale package type. In addition, without being restrained by the arrangement of the electrodes 411 of a semiconductor chip 401, the arrangement of the outer electrodes 422 soldered to the conductor end of a circuit board to be packaged can be freely set within the chip scale so that the interval of the outer electrodes 422 and 422 can be sufficiently increased.
In FIG. 10, reference numeral 401 denotes a semiconductor chip and reference numeral 402 denotes an auxiliary wiring plate in which routing conductors 424 are printed on the one side of an insulating supporting plate (ceramic plate) 425. A metallic bump 412 is adhered to each of electrodes 411 of the semiconductor chip 401. The metallic pump 412 is connected to the end 441 of the routing conductor 424. The space between the semiconductor chip 401 and the auxiliary wiring plate piece 402 is sealed with resin 403. Holes 421 are provided at the positions corresponding to the conductor ends of a circuit board. The holes 421 are filled with solders 422. A soldering bump 423 is formed on each of the solders 422. The semiconductor chip 401 is fixed on the molding circuit board using the soldering bumps 423 by the reflow method.
In the chip scale type package type of semiconductor device, the metallic bumps 412 must be previously adhered to the electrodes 411 of the semiconductor chip 401. This makes the process of manufacturing a semiconductor chip complicate, deteriorates the yielding rate of products and hence increases the production cost of semiconductor chips.
Since the insulating supporting plate 425 of the auxiliary wiring plate 402 is made of the ceramic plate, it is difficult to adopt the TAB method for manufacturing the semiconductor device according to the above invention.